SANTA CLARA, Calif. – ARM provided the first peak at its Cortex A57 high-end 64-bit core at ARM Tech Con here Wednesday (Oct. 31). The A57 aims to provide maximum performance in a mobile power envelope, extending ARM’s reach into networking and server systems.
The out-of-order design will deliver performance measured at 1250 SpecInt2000 at 1.7 GHz, or about 25-30 percent more umph than today’s 32-bit A15 cores. It can be clocked at up to 2.5 GHz in a 20 nm process, said Mike Filippo, principal design architect for the part.
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Filippo declined to provide detailed performance and architecture figures such as performance per watt. However, in a series of slides reproduced below, he outlined the main features of the core. It will provide three times the performance of today’s high-end smartphones. In configurations with up to 16 cores on the new ARM CoreLink interconnect it will deliver a ten-fold performance increase over the current A15, ARM claimed.
The A57 will also deliver slightly greater power efficiency than the A15, but it could require as much as 30 percent more die area, Filippo said. The core was designed for equally effective use on 32- and 64-bit code, he added.
“It’s a straightforward translation of the A15 to 64-bits-- not a revolutionary microarchitecture but a new ISA with optimizations,” said David Kantor, an independent microprocessor analyst at Real World Technologies
. “It’s a pretty cool part, though it will eat more power."
In a separate talk, ARM outlined its little brother companion, the A53, an in-order, 64-bit part focused on minimizing power consumption. It’s expansion to a 16-way set associative L2 cache was one of the remarkable features of an otherwise straightforward architecture, said Tom Halfhill of the Microprocessor Report
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