# Digital Lowpass: A filter by any other name is still a filter

(*Editor's note*: this is part of an on-going series of "dialogues" between the authors; there are links to the previous installments at the end, immediately above the "About the Authors" section. Also below are also two "Desert Island Design" articles, by one of the authors.)

[*Dave is down in lab, staring at a screen full of Verilog code ...*]

*Dr. T (Tamara Schmitz)*: Hi Dave, what are you doing now?!

*Dave (Dave Ritter)*: Oh, hi, Dr. T. This is a PCB prototype for a new chip, a mixed-signal chip. We are building the digital part in an FPGA. The Verilog code for the FPGA looks like this, **Figure 1**. (*Dave gestures to the screen.*)

*Figure 1: Snippet of Verilog code for an 8-bit counter*

*(Click on image to enlarge)*

*Dr. T*: It almost looks like a program, like C code. Who wrote all this code?

*Dave*: One of our top engineers, Warren Craddock, put this together and you are right–I'm not an expert, but I can modify other people's code using my experience with C from the old days. The one big difference is that software C code is executed by a processor and Verilog is compiled into hardware logic. They say that the Verilog is 'concurrent' (each statement is executed simultaneously since each has its own dedicated logic) whereas the C code is 'sequential' (statements are executed in order since there is only one processor).

*Dr. T*: Very interesting, but you are still just working on bits. You can't really process signals that way, can you?

*Dave*: That's a common misconception among analog designers. It's true that a single bit doesn't represent an analog signal very well in most cases, but if you gather a bunch of bits into a bus, it represents a number. And the number of numbers increases exponentially with the number of bits, so that 8 bits gives me 256 choices, but 12 bits gives me over 4000.

*Dr. T*: So a bus can represent an analog signal the same way an A-to-D converter represents the analog input at its output. It is quantized in both time and amplitude.

*Dave*: Exactly. An 8-bit converter splits the 0-to-2V input into 256 numbers, and produces a number on each clock cycle. The signal is now a stream of numbers.

*Dr. T*: Sounds expensive. You always need A-to-D and D-to-A converters.

*Dave*: Not necessarily. We may start with an analog signal, but we don't have to. We can internally generate signals in the logic that represent ramps, triangle waves, sine waves, and so on. Those signals don't necessarily get to the analog world, but we process them with filters, modulators and peak detectors just like analog signals.

*Dr. T*: Time for an example. The simplest filter I can think of is an RC low-pass filter. Let me sketch the circuit and its Bode plot, **Figure 2**.

*Figure 2: Analog RC filter with Bode plot and impulse response*

*(Click on image to enlarge)*

*Dave*: Looks good. Do you want me to show you the digital equivalent? Let's say I want to smooth a digital signal the way you might want to smooth a V_{Ref} signal to get rid of noise.

*Dr. T*: When I filter a V_{Ref} signal, I try to get rid of the 'fuzz', the high frequency content that just represents noise, not signal. What do you do with digital signals, make the square bits round?

*Dave*: Nope. When we 'smooth' a digital signal, we want to get rid of quick changes that represent noise the same as your V_{Ref} 'fuzz'.

*Dr. T*: So a noisy digital signal is a just stream of numbers that jump around a lot?

*Dave*: Right. And we want to smooth out the jumps.

*Dr. T*: Okay, so again, what's the digital equivalent of my simple RC filter?

*Dave*: Well, first we should look at your analog RC filter in a little detail.

*Dr. T*: That's easy, it has a time constant of RxC and it rolls off at 20 dB/decade (6dB/octave) above the pole frequency of 2** π**RC (in radians).

*Dave*: Yes it does. But it's easier to work with the impulse response in this case. The impulse response is easy. It's just a decaying exponential.

*Dr. T*: So, the impulse charges the capacitor very quickly and then the voltage decays as the charge dissipates through the resistor.

*Dave*: Right again. We don't really ever have impulses of course, but they are useful mathematical fictions. The point is that the RC filter decays exponentially: the decaying rate is always proportional to the remaining voltage, because that determines the current in the resistor.

*Dr. T*: Okay if you have to view it in the time domain.

*Dave*: We're getting to the point. Here's the digital equivalent, **Figure 3**:

*Figure 3: Digital IIR low-pass filter with impulse response and Bode plot*

*(Click on image to enlarge)*

*Dr. T*: Wait a minute—I see a summer, a gain block and I assume that z^{-1} is a delay block. Those are analog blocks. I thought we were talking digital?

*Dave*: We are. There are both analog and digital representations of each of those blocks. Take the summer for example.

*Dr. T*: Which can be just a couple of resistors, or an op amp circuit.

*Dave*: Or it can be a collection of digital gates, an adder. Here's how we build a digital adder (**Figure 4)**:

*Figure 4: The Evolution of the Adder transistors, gates, half adder, adder*

*(Click on image to enlarge)*

*Dr. T*: You're making me remember my logic class! That first collection of gates is a half adder, and two of those make a full adder, and a bunch of those can add two numbers together in binary form. Okay, but it looks like a lot of stuff. In analog I can do it with three resistors and an op amp.

*Dave*: And that might be several times as big! The collection of gates is a few hundred transistors. In a modern CMOS process you could fit a few dozen of those Figure 4 circuits under a bonding pad. Your op amp is probably several times that size.

*Dr. T*: Okay, but what does it do? How does it work?

*Dave*: To figure out what it does, we apply a discrete impulse, which is 1 at zero and zero everywhere else. So the first input is 1, and the first output is 1, just look at the impulse response curve in Figure 3.

*Dr. T*: Okay, so that's why you put that there! Easy so far

*Dave*: On the next clock cycle the input Drops to zero (since it is an impulse) and the only term is the feedback through the gain block 'a', which is normally less than 1.

*Dr. T*: So the next output is 'a', and then the next output is 'a*a', and the next is 'a*a*a' and since 'a' is less than 1, they keep getting smaller. It looks like the output at the k^{th} sample is just a^{k}!?

*Dave*: Correct. It Drops off exponentially just like the analog RC filter's impulse response.

*Dr. T*: So it must have similar effect on digital signals that an RC has on analog signals.

*Dave*: Sure does! Here's a picture of a simple pulse signal with noise added (**Figure 5**). The third plot shows an overlay of the output of BOTH the digital and analog filters processing the noisy signal. The analog processed signal is red and the digital is blue, but it doesn't matter because they are basically identical.

*Figure 5: Signals low-passed in both analog and digital domains*

*(Click on image to enlarge)*

*Dr. T*: They're exactly the same

*Dave*: And there are lots of little functional blocks like this that make digital signal processing as easy as analog.

*Dr. T*: But I still need to understand the z^{-1} block. And the Bode plot in Figure 3 seems to swing back up again. Why? And how do a make a digital gain block? I can't just make the bits bigger or smaller.

*Dave*: No, you can't, but we're out of time for now. Next time I'll show you how to make this into a real digital circuit and then, if you're lucky, will talk to a digital designer about how to turn that into Verilog code.

*Dr. T*: I don't know. First you're going on about the time domain instead of frequency domain and now it's digital instead of analog. I'm not sure about this.

*Dave*: No, not "instead of", the idea is that we use "time and frequency" together to get a better picture of a signal and its processing. And we use digital along with analog to do the best possible and most efficient signal processing. It's "BOTH AND" not "EITHER OR". The time domain picture complements the frequency domain picture. The digital signal processing bag of tricks complements the analog bag. I think future engineers shouldn't be analog or digital, or frequency or time domain, they should be signal processors: flexible, creative, and very powerful signal processors.

*Dr. T*: Okay, but first, I think it's lunch time.

*Dave*: Tex-Mex today then?

**Previous "dialogues" in this series: **

- Power Trip: Dealing with kVA issues, power factor, and smaller boost vs. buck regulators
- The elegance of ferrite beads as a circuit design and problem-solving component
- True engineers solve problems using the tools at hand: building a bandgap reference
- Matching your socks. . . and your inputs
- Avoiding op amp "motor boating" (also known as "inadvertent positive feedback")
- A bypass-capacitor dialogue peels back the layers, Part 1
- A bypass-capacitor dialogue peels back the layers, Part 2: The theory of ground relativity
- A bypass-capacitor dialogue peels back the layers, Part 3: Continuing the discussion on layout considerations

**Other related articles by Dave Ritter: **

- Desert Island Design: Bridging the (filter) gap without software
- Desert Island Design: Bridging the (band) gap without software

**About the authors**

** Dave Ritter **grew up outside of Philadelphia in a house that was constantly being embellished with various antennas and random wiring. By the age of 12, his parents refused to enter the basement anymore, for fear of lethal electric shock. He attended Drexel University back when programming required intimate knowledge of keypunch machines. His checkered career wandered through NASA where he developed video-effects machines and real-time disk drives. Finally seeing the light, he entered the semiconductor industry in the early 90's. Dave has about 20 patents, some of which are actually useful. He has found a home at Intersil Corporation as a principal applications engineer. Eternally youthful and bright of spirit, Dave feels privileged to commit his ideas to paper for the entertainment and education of his soon to be massive readership.

** Tamara Schmitz** grew up in the Midwest, finding her way west with an acceptance letter to Stanford University. After collecting three EE degrees (BS, MS, and PhD), she taught analog circuits and test-development engineering as an assistant professor at San Jose State University. With 8 years of part-time experience in applications engineering, she joined industry full-time at Intersil Corporation as a principal applications engineer. In twenty years, she hopes to be as eternally youthful as Dave. .

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PixchipsAtTi 3/5/2012 5:14:04 AM

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JohnJuan 4/28/2010 2:37:05 PM