# A Quadrature Demodulator Tutorial

ABOUT THE AUTHORS
Danielle Coffing
joined Motorola Semiconductor Products Sector in Tempe, AZ in 1997.
Since then, she has worked in the area of high-frequency analog
integrated circuit design and development. She holds one patent and
has seven pending. She received her BSEE and MSEE degrees from the
Massachusetts Institute of Technology in 1996 and 1997,
respectively.
Eric Main joined Motorola Semiconductor Products Sector in 1970. Since then, he has worked in the area of analog integrated circuit design and development. He received his B.Sc.(Eng) in electrical engineering from the University of Aberdeen, Scotland in 1965. He holds 41 patents and has seven pending. |
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**Figure 1**shows the block diagram of this quadrature demodulator. The phase detector compares the phase of the IF signal (

*v*

_{1}) to

*v*

_{2}, the signal generated by passing

*v*

_{1}through a phase shift network. This phase shift network includes an LC tank

*(L, R*and a series reactance

_{p}, and C_{p})*(C*The network gives a frequency-sensitive 90° phase shift at the center frequency. The phase detector discussed here is the bipolar double-balanced multiplier popularized by Bilotti. The output of the multiplier (

_{s}).*I*) is filtered, which results in a DC level that changes as the input frequency changes.

_{o}

**Figure 1:** Quadrature demodulator block diagram

**Figure 2**). The impedance

*(Z*of the parallel combination of

_{p})*L, R*is:

_{p}, and C_{p}

**Figure 2:** Small-signal model of the quadrature
phase-shift network

The ratio of *v*_{2} over *v _{1}* is
the ratio of impedances

*Z*(s) over (Z

_{p}_{p}(s) + 1/

*sC*). Simplifying this ratio,

_{s}

The resonant frequency _{n} of this filter is:

The quality factor *Q* of the phase shift network is
*R _{p}/(_{n}L).* Next,

**Equation 2**is used to solve for the transfer function from

*v*

_{1}to

*v*

_{2}. The variables

*and*

_{n}*Q*are substituted into

**Equation 2**and

*v*

_{2}/

*v*

_{1}is written in terms of

*s*=

*j*where

_{n}:

In **Equation 4**, is the deviation from the carrier frequency,
and 2*Q*/_{n} is the normalized
deviation. Defining:

**Equation 4** can be written as:

Writing *v*_{2} in terms of
*v*_{1},

**Equation 7** describes the signal at one multiplier input
in terms of the signal at the other input. The signal
*v*_{1} is applied to the first input and is in
limiting (a square wave). The signal at the second input
(*v*_{2}) is a linear signal. By integrating over half
of the period, you get the average value of the multiplier output
current:

For a bipolar differential amplifier, *g _{m}* is

*I*where 2

_{o}/V_{T}*I*is the multiplier bias current. Substituting for

_{o}*v*

_{2}and

*g*,

_{m}

where *V*_{1} is the peak voltage of the signal
*v*_{1}. Simplifying **Equation 9** yields the
transfer function for the quadrature demodulator:

In **Figure 3**, the term *a*/(1+*a*²) from
**Equation 10** is plotted versus the normalized frequency
deviation *(a).* This plot is the quadrature demodulator
s-curve. As the frequency of the signal applied to the demodulator
becomes more positive than the natural frequency of the phase shift
network, the filtered output of the multiplier increases. Likewise,
the filtered output decreases as the frequency of the input signal
decreases.

**Figure 3:** Plot of normalized demodulator output vs.
normalized frequency deviation

**Figure 4**shows an integrated circuit implementation of the quadrature demodulator. The input signal

*v*is supplied from a limiting amplifier and is a square wave of known amplitude. The input signal

_{in}*v*is level shifted, and

_{in}*v*

_{1}is applied to transistors

*Q*

_{1}and

*Q*

_{2}. The amplitude of

*v*

_{1}is large enough such that

*Q*

_{1}and

*Q*

_{2}are switched completely on or off during each cycle. Capacitor

*C*is typically integrated while

_{s}*C*and

_{p}, L,*R*are external components. The component values are chosen such that the amplitude of

_{p}*v*

_{2}is less than that of

*v*

_{1}as given by

**Equation 7**. This causes transistors

*Q*

_{3}-

*Q*

_{6}to operate as linear devices rather than switches. The output of the multiplier is converted from a differential current to a single-ended voltage

*v*. The output is filtered by components

_{o}*R*and

_{f}*C*.

_{f}

**Figure 4:** Integrated circuit implementation of the
quadrature demodulator

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