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Design optimization of flip-chip packages integrating USB 3.0

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re: Design optimization of flip-chip packages integrating USB 3.0
docdivakar   6/13/2011 11:35:42 PM
Nice article BUT one request: if you refer to numbers in the figure, PLEASE make the figures larger so we can see what they are! The improvement in 15dB point is some what ambiguously pointed to filling the via though I agree it improves marginally. It is the additional ground vias in the return path which is well a known practice in highspeed design. One thing your article completely ignores: USB 3.0 has higher max current draw, 900mA @5V DC. The corresponding flip chip interconnections and the package substrate designs have to take into account the current density & electromigration effects at the flip chip to substrate interface. So what is supposedly a good signal integrity-verified design does not automatically guarantee a reliable design. Dr. MP Divakar

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