Editor’s note: This work was first presented at the 2012 IEEE
International Electron Devices Meeting (IEDM) and appears here courtesy
of the IEEE. For more information about IEDM 2013 (Washington DC;
December 9-11), click here.
Back end of line (BEOL) friendly access devices (AD) based on copper-containing mixed-ionic-electronic-conduction (MIEC) materials [1-3] are shown to scale to the less than 30-nm CDs and less than 12-nm thicknesses found in advanced technology nodes. Switching speeds at the high (greater than 100 µA) currents of NVM writes can reach 15 ns; NVM reads at typical (approximately 5 µA) current levels can be much less than 1µs.
Making phase-change memory (PCM), resistive RAM (RRAM), magneto-resistive RAM (MRAM), or any other nonvolatile memory (NVM) as cost-effective as NAND flash less than or equal to 4F2/3) will require 3D-stacking of large crosspoint arrays in the BEOL. Previously[1–3], we have shown (see figure 1) that MIEC-based ADs exhibit the large ON/OFF ratios needed for large crosspoint arrays, with bipolar diode-like characteristics, large voltage margin Vm (for which leakage stays below 10 nA), ultra-low leakage (less than 10 pA), and high ON current densities. 512-kb arrays of such MIEC ADs have been integrated with 100% yield (see figure1b).
Figure 1: MIEC-based ADs exhibit the large ON/OFF ratios needed for large crosspoint arrays, showing high voltage margin Vm(for which leakage stays below 10 nA), high ON current densities, (a) ultra-low leakage (less than 10 pA), and (b) tight margins (as well as 100% yield) when integrated on 8-in CMOS wafers in large (512-kb) arrays.
While early MIEC ADs had ultra-scaled bottom electrodes (BEC less than 20 nm), top electrodes (TEC) were much larger. Later demonstrations of moderate-aspect-ratio, con?ned MIEC ADs have used CDs from 80 to 180 nm [2–3], and operation speed was only brie?y investigated . In this paper, we address write speed by demonstrating rapid (15 ns) PCM RESET, evaluate the prospective read speed of MIEC ADs at lower currents with an array-integrated sense ampli?er, and use short-loop MIEC devices to aggressively scale both thickness and critical dimension (CD). Speed of MIEC ADs for NVM write and read
To demonstrate NVM write speed capabilities, an MIEC-based AD was used to rapidly RESET a co-integrated phase change memory (PCM) device (see figures 2 and 3). Between each 15-ns RESET pulse at varying amplitude, a long SET pulse was used to recrystallize the doped-Ge2
PCM material (see figure 4). After each pulse, bipolar dc IV curves were measured (see figure 5), to gauge both the resistance state and the low-leakage characteristics of the MIEC AD. Read current at 660 mV (see figure 6) reveals full switching after single RESET pulses, demonstrating that MIEC-based ADs can supply approximately 200 µA in less than 15 ns.
Figure 2: MIEC-based ADs are co-integrated with PCM and a 180 nm FET.
Figure 3: Switching of PCM with a MIEC are co-integrated with PCM based AD alternated between 15-ns RESET pulses at varying amplitude, a long SET pulse, and dc IV curves.
Figure 4: Since melting can be initiated very rapidly, PCM RESET occurs as rapidly as the co-integrated MIEC AD can supply suf?cient switching current; in contrast, SET speed is limited by crystallization of the doped Ge2Sb2Te5 (GST).
Figure 5: After each RESET or SET pulse bipolar dc IV curves were measured. Once the current supplied by MIEC is sufficient to melt the GST, a large resistance contrast (approximately 1 MO) between SET and RESET develops, associated with a significant change in the IV characteristics of the stacked device-pair. Despite the large currents, the low-leakage characteristics of the MIEC AD remain unaffected.
Figure 6: Read current at 660 mV shows full switching after single RESET pulses, demonstrating clearly that MIEC-based ADs can supply approximately 200 µA in less than 15 ns.