SAN FRANCISCO Celoxica Holdings plc, a developer of C language hardware design entry tools and computer acceleration intellectual property (IP) and hardware, said it has enhanced C++ coding support in its Agility Compiler high-level design tool, raising the level of design abstraction above SystemC for designers who need to boost productivity and for programmers less familiar with hardware design.
According to Celoxica (Oxfordshire, England), using the C++ coding style enables developers to more easily exploit the productivity gains and simulation benefits of C level design without compromising area or timing optimization.
The Agility Compiler is said to address the middle ground between the unfulfilled promise of push-button design and the register transfer level (RTL). The tool offers support for C++ classes, templates and inheritance that provide abstractions to shield low level detail from the core algorithm, according to Celoxica. Communication between objects can be done using C++ member function calls or FIFO's, and the need to use internal SystemC ports and port mapping for object hierarchy has been remove, the company said.
"Customers demand a quality-of-results performance directly linked to a level of design abstraction that delivers measurable productivity gains, but with the necessary accuracy and control," said Jeff Jussel, Celoxica's vice president of marketing and general manager of the Americas. "Using Agility you can dive into the low level implementation detail, but it isn't mandatory. A simple C++ function call can be used to turn a C array into a RAM, or you can instantiate RAM blocks by hand and manually implement a low level RAM driver."
Celoxica did not provide pricing information for Agility Compiler.