Lattice Semiconductor Corporation has announced the availability of Real-Time Operating System (RTOS) support for its LatticeMico32 open source 32-bit soft microprocessor. A port of Micrium's uC/OS-II RTOS is included with the latest version of the LatticeMico32 Development Tools, which is being released concurrently with Lattice's ispLEVER software design tool suite, Version 6.1. The combination of the LatticeMico32 microprocessor and the uC/OS-II RTOS allows users to rapidly develop embedded systems, particularly performance sensitive real-time systems.
Micrium's uC/OS-II RTOS
The uC/OS-II is a portable, ROMable, scalable, preemptive real-time multitasking kernel (RTOS) for microprocessors, microcontrollers and DSPs. Micrium's uC/OS-II is provided as 100% portable ANSI C source code, which can manage up to 255 tasks and provide the following services:
- Mutual Exclusion Semaphores (to reduce priority inversions)
- Event Flags
- Message Mailboxes
- Message Queues
- Task Management (Create, Delete, Change Priority, Suspend/Resume etc.)
- Fixed-Sized Memory Block management
- Time Management
- Timer Management
Designers can scale uC/OS-II to contain only the features they require, creating a small footprint. For example, the uC/OS-II can be reduced to as little as 2K bytes of code space and 200 bytes of data space (excluding stacks). Furthermore, the execution time for most of the services provided by the uC/OS-II is constant and deterministic, so that execution times are not dependant on the number of tasks running in a given application.
About the LatticeMico32 embedded processor core
The LatticeMico32 core is a comprehensive, high performance and easy to use 32-bit soft RISC microprocessor utilizing the open-standard WISHBONE bus and is optimized for use with Lattice Field Programmable Gate Arrays (FPGAs). The footprint-efficient soft core typically requires only 2K LUTs of FPGA logic and has a variety of configurations which trade-off instruction and data caching, hardware multiplication and other core features to optimize performance and LUT utilization. Eight standard peripherals including memory controllers, UARTs, I/O ports and other common functions are being offered initially with the microprocessor to complete the system-on-a-chip solution.
The LatticeMico32 core is unique among the microprocessors offered by FPGA vendors because the generated microprocessor and selected peripheral HDL code are licensed under Lattice's open source license agreement. This unique license allows users to ensure that their proprietary designs remain proprietary and allows the implementation and distribution of hardware without the need for a separate license agreement. Additionally, the GNU-based compiler, assembler, linker and debugger, supplied by Lattice, are released under the standard GNU General Public License (GPL) agreement. The flexible LatticeMico32 microprocessor will find application in a wide variety of markets including communications, consumer, computing, medical, industrial and automotive.
Pricing and availability
Lattice includes a port of the uC-OS-II RTOS from Micrium in its LatticeMico32 Development Tools, which are open source and free of charge. This port is for evaluation and non-commercial use. For commercial use, designers should obtain a license directly from Micrium. The LatticeMico32 Development Tools CD is shipped with the ispLEVER design tool suite or can be Downloaded from the Internet.