Winchester, UK - Synopsys, Inc. (Mountain View, Calif.) has created an optimized reference implementation methodology for the ARM Cortex-A8 processor that claims to achieve greater than 2 GHz (4000 DMIPS) at 540 mW.
The result was accomplished by combining optimized methodology, tools and ARM Physical IP to enable new classes of mobile and tethered devices requiring the combination of high-performance and energy efficiency.
Synopsys and ARM have collaborated in a series of implementation case studies across methodologies, libraries and process technologies targeted at increased performance of a fully automated synthesizable ARM Cortex-A8 processor. To achieve optimized results, the Synopsys team used the Synopsys Galaxy Implementation Platform, including some of the latest 2009.06 Design Compiler Graphical, IC Compiler, StarRC and PrimeTime SI capabilities, ARM Physical IP libraries and memories for a 40nm foundry process together with highly tuned floorplan and design constraints. The ARM Cortex-A8 processor optimized implementation achieved greater than 2 GHz in the typical corner on a 40 nm process while consuming 0.24 mW/MHz dynamic power and 57 mW static power using less than 2 percent LVt cells.
The implementation team at Synopsys took advantage of the latest capabilities in the Galaxy Platform, including: library subset usage scenarios, delay performance versus cell area tradeoffs, cell placement density versus floorplan dimension tuning, leakage optimization techniques, multi-corner multi-mode (MCMM) optimization for better timing correlation and signoff optimization between IC Compiler and Prime Time, as well as the usage of the latest clock tree synthesis capabilities together with intelligent user clock constraints. The Galaxy Platform is a key component of Synopsys' Eclypse Low Power Solution and the Lynx Design System.
"Our collaboration with Synopsys will enable our licensees to achieve the kind of high-performance they need while preserving energy efficiency to be competitive in their marketplace," said Eric Schorn, VP marketing, Processor Division, ARM.
Synopsys is continuing to apply the optimized methodology used on the ARM Cortex-A8 processor to additional ARM Cortex processors. At the ARM TechCon3 conference in the Santa Clara Convention Center, Santa Clara, Calif. on October 21-23 2009, the Synopsys implementation team will be presenting their latest ARM Cortex-A8 and ARM Cortex-A9 processor optimized implementation methodologies and results.
The Synopsys Galaxy Implementation Platform methodology (scripts and documentation) for the 2 GHz ARM Cortex-A8 optimized implementation is available from ARM and Synopsys.
In addition, Synopsys offers complementary professional services to introduce advanced design methodology as well as high-performance/low-power SoC design techniques, including integration of advanced ARM Cortex family processors. The synthesizable Cortex-A8 and Cortex-A9 processors and optimized physical IP platform are available from ARM.
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