SAN FRANCISCO – Datacenter chips need lower latencies to keep up with the rise of sensor data, a Google fellow told attendees at the International Solid-State Circuits Conference (ISSCC). New kinds of computer architectures and security techniques will emerge to handle the challenges, added technical executives from ARM, Intel, and Fujitsu in an evening panel.
Google's datacenters process "big data with little time," said Luiz Barroso, technical lead of the search giant's datacenter group. For example, during a Google search "almost as fast as you can type we are searching ridiculous amounts of data computed on the fly to give you a seamless experience with a system that almost guesses what you will do next," he said.
As wearables such as Google Glass emerge, imagine "how much bigger the problem will be when each user can talk to their services in addition to all the sensor data that will be available," he said. "Latency hiccups will compromise the performance of your system," he said, asking engineers to explore new circuit techniques to handle the problem.
Specifically, Barroso called for help with an emerging problem of microsecond-class latencies between two systems communicating inside a datacenter.
"We haven’t been paying attention to it," he said, noting flash and emerging memory technologies may sport latencies in tens of microseconds. "We don’t have the underlying mechanisms to make it easy for programmers to deal with microsecond level latencies -- what if you could deal with them in processors?" he asked.
The kinds of latencies between non-volatile memory and a GPU, for example, "could be supported in microarchitecture in a much more fundamental way," he said.
Next age: New memories, security reshape computing