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Moore's Law Has No End in Sight

GaAs is VLSI's inevitable successor to silicon
9/12/2014 09:56 AM EDT
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Or_Bach
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Monolithic 3D Cost Reduction Go Farther
Or_Bach   9/12/2014 8:39:59 PM
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Monolithic 3D cost reduction only start with reduction of buffers driver and sizing. You can learn more about it at MonolithIC 3D web site -  3D IC Edge 

The cost reduction reulted from hetrogenious integration would be very significant. 

The cost reduction for embedded memory will track the cost reduction of 3D NAND

And the list goes on

 

 

 

 

krisi
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Re: Moore's law
krisi   9/12/2014 7:03:58 PM
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Well , I hate to say it David but lust has its limits ;-)

buprestid
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Re: Moore's Law Stopped at 28 nm
buprestid   9/12/2014 6:43:45 PM
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Monolithic 3D has as much to do with Moore's Law as III-V materials. 3d will not necessarily save costs for logic.

 

3D claim. Interconnect is shorter, total wiring is reduced, and buffers are saved. This translates to lower area and reduced cost.


III-V can make same claim. Speed up allows lower drive strength which means smaller cells. This translates to lower area and reduced cost.

 

 

R_Colin_Johnson
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Re: dreams
R_Colin_Johnson   9/12/2014 6:27:59 PM
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Your are right in principle, the indefijitely was a reference to how 40nm wth III-V is as good as 10 nm in silicon, and by the time we get to the atomic level with III-V we will have a new material that is as good at 40mn as III-V is at 10 nm and on and on.

David Ashton
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Moore's law
David Ashton   9/12/2014 6:17:01 PM
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I know almost nothing about the technologies described herein, but I am always dubious about the Moore's law doomsayers.  Our lust for ever more powerful chips will keep it going for a bit yet.  3D is one way, GaAs is another, who knows what someone will come up with next year?  Don't forget Moore's law is about the number of transistors on a chip, nothing else.  How big they are and how you get them there is not the point....

krisi
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dreams
krisi   9/12/2014 5:55:02 PM
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I agree, Colin must be dreaming here: "extending Moore's Law indefinitely"...indefinitely??? each semicondctor has a lattice consisting of atoms so scaling will always end at the feature size of few nm no matter which semiconductor material is used

GroovyGeek
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Re: poet
GroovyGeek   9/12/2014 5:35:12 PM
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GaAs for NMOS, Ge for PMOS... Life is but a dream within a dream...

AKH0
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Re: Moore's Law Stopped at 28 nm
AKH0   9/12/2014 12:13:22 PM
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Zvi, I agree. Use III-V for what they are good for. Even if you demonstrate medium sized III-V circuits, there is no way in foreseeable future to get the density and cost comparable to Si CMOS. There are however, applications where integrating some optics or even a superfast, but not necessarily dense computing engine on Si chip can add significant value, and once compared to the alternative -- packaging or off-chip solutions -- can actually drop the overal cost of the system.

Honestly, the only reason big guys are working on the alternative channel materials is that they are expected to. You have money and you are expected to burn some on research, even if you do not have a good feeling it makes it to production anytime soon -- if ever. With all respect, the choice of the channel material is the least relevant question at 7nm and beyond (if these nodes ever happen in their traditional definition of density). But it is the easiet to run some wafers and make a few foils and scientific papers to appeal the general public.

 

R_Colin_Johnson
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Re: Moore's Law Stopped at 28 nm
R_Colin_Johnson   9/12/2014 12:12:31 PM
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Or-Bach: I am inclined to agree with you, but POET, Intel and Samsung are all hedging their bets by trying to work III-V materials into their ICs. We'll just have to wait and see if they fail. Of course, all the 3-D work you mention will continue regardless. Thanks for the comment.

R_Colin_Johnson
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Re: poet
R_Colin_Johnson   9/12/2014 12:09:26 PM
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Yes, the high mobility of any III-V circuits implementing CMOS or other circuits needing p-type transistors will be limited by its hole mobility--for now. But POET claims to have some tricks up its sleeve for improving p-type III-V. Samsung is using planning on using germanium for the p-type in its III-V CMOS. Don't know yet if POET has a better solution.

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