I just had a very interesting conversation with the folks from AtaiTec Corporation. Yes, I know you don’t know who they are or what they do. This is because -- until now -- they've been "running silent, running deep" in stealth mode. However, this week at DesignCon 2015, AtaiTec is going to formally announce its presence on the EDA world stage.
"And what does AtaiTec do?" You may ask. Well, chip-to-chip connections in many of today's systems are currently running at 10Gbps; some are running at 20Gbps and higher. Also, most high-speed interconnect specifications above 3Gbps are defined using S-parameters (scattering parameters).
The problem is that it's easy for errors to creep in when using S-parameters, including incorrect DC or low-frequency values, passivity and/or causality inaccuracies, etc. Engineers face problems when creating S-parameters from simulation and/or real-world measurements. Accurate simulations require accurate data for material properties, while measurement requires accurate de-embedding. The current state-of-play is that signal integrity (SI) engineers cannot easily correlate simulation and measurement results at 20 Gbps and above.
AtaiTec says a new approach is required to create and/or correct S-parameters for accurate simulation, measurement, and correlation. Since many users aren’t SI specialists, such a solution must be much easier to use than existing SI products. Furthermore, in order to address today's increasing market pressures, the solution must also help to reduce design time.
Current design flows may be represented as shown below, where VNA represents an integrated test instrument called a Vector Network Analyzer.
AtaiTec has developed a suite of tools -- ISD, ADK, X2D -- to enhance current flows as illustrated below.
The ISD module (which stands for In-Situ De-Embedding) offers a cost-saving alternative to replace TRL (Thru, Reflect, Line) calibration. ISD is simple (only a single 2X through test coupon is required), accurate (it removes fixture crosstalk and causal DUT results), and extremely cost-effective.
The ADK module (which stands for Advanced Signal Integrity Design Kits) offers TDR (Time-Domain Reflection/Reflectometry) and TDT (Time-Domain Transmission/Transmissometry), passivity and causality correction, eye diagrams, S-to-Spice conversion, scope-de-embedding, and much, much more. Of particular interest is the ease of use -- complex SI operations can be performed using a single click of the mouse.
Last, but not least, the X2D module is an accurate 2D solver that is used for modelling causal dielectric and surface roughness. This module can be used in conjunction with the ISD module to extract material properties.
As just one example of the use of AtaiTec's solutions, representatives from Hirose Electric and AtaiTec Corp. will be presenting a paper at DesignCon on Thursday, January 29, at 2:50 p.m. This paper -- A novel method to reduce differential crosstalk in a high speed channel -- presents a new technique to minimize differential crosstalk by adjusting its four single-ended terms.
If you happen to be attending DesignCon, please take a moment to visit with the folks at AtaiTec and tell them "Max says 'Hi'"
— Max Maxfield, Editor of All Things Fun & Interesting