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TSMC to Start 10nm in 2017, Closing Gap with Intel

By Alan Patterson, 02.24.15 4

TAIPEI — Taiwan Semiconductor Manufacturing Co. (TSMC), the world’s largest chip foundry, said that it expects to start 10 nanometer production in 2017, when it will have process technology matching that of industry leader Intel Corp.

“The performance of our 10nm, in terms of speed, power and density will be equal to what we believe Intel will define as its 10nm technology,” TSMC Director of Corporate Communications Elizabeth Sun told EE Times. “Technology-wise, we think we can close the gap at 10nm.”

For the first time this year, TSMC is expected to have the largest capex in the semiconductor industry as it aims to maintain its lead in the foundry business against rivals such as Samsung, Intel and Global Foundries.

TSMC has raised its capital expenditure budget for 2015 to US$11.5-12.0 billion, an increase of 11.5-20.0 percent compared with 2014, mainly due to its confidence in demand for advanced geometries. Intel spent $10.1 billion on capex during 2014. For the current year, Intel expects that figure to hold steady, at $10 billion, plus or minus $500 million.

Moore’s Law ‘Challenged’
Fewer companies can afford the huge investments in advanced production as Moore’s Law is becoming “challenged”, Sun said.

“When you continue chip-level scaling, the cost goes up,” Sun said. “The cost is escalating, so fewer and fewer people can really afford it.”

TSMC will start 10nm production at its existing Taichung, Taiwan site, where the chipmaker will later embark on production at more advanced technology nodes, Sun said.

By the end of 2018, the company’s Taichung site will reach a monthly output capacity of 90,000 wafers at the 10nm and more advanced technology nodes, according to a report on the Chinatimes.com website.

TSMC earlier this month said it would invest NT$500 billion ($15.9 billion) as part of an expansion at the Taichung site in central Taiwan.

TSMC’s sales revenue in 2015 will likely rise by "several percentage points" more than the estimated industry average of 12 percent, according to TSMC co-CEO Mark Liu, speaking at an earnings event in January.

For the first quarter of 2015, TSMC forecast sales revenue ranging from NT$221 billion to NT$224 billion, about 50 percent higher than the first quarter of 2014.

The company’s Taichung fab in 2014 had an output worth NT$200 billion, accounting for 28 percent of TSMC’s total production.

Lithography tools
TSMC will use immersion lithography tools for 10nm production, Sun said. The company has not yet announced what lithography tools it will use for more advanced nodes.

“We are working with ASML with the objective at some future point if extreme ultraviolet (EUV) becomes manufacturing ready, we can insert EUV partially to 10nm,” she said. “Partial insertion means only in a few critical layers.”

The use of EUV for process technology beyond 10nm still depends on whether it will be ready for manufacturing, Sun said. “It is still a work in progress,” she added.

—Alan Patterson covers the semiconductor industry for EE Times.

4 comments
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rick merritt
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rick merritt   2/24/2015 11:33:40 AM

Interesting comment from TSMC PR person!

At an ISSCC panel last night TSMC's Jack Sun said precious little about the company's plans, declining even to elaborate on its news yesterday it exposed 1,000+ wafers in 24 hours on its latest EUV machine running at 90+W.

Of course Intel's Mark Bohr sitting next to him also said nothing about when or how Intel will deliver cost-effective 10 and 7nm nodes though he continued to express confidence in them. Bohr has been making the point for several mo ths that Intel is way ahead of the competition with its 14nm FinFET process now in volume production.

Gondalf
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Gondalf   2/24/2015 12:30:24 PM

Ummm too much galore around new processes :).

TSMC has not even shipped 16nm and it is all on 10nm, very funny.

I have the suspect Intel has won a big foundry contract from some large phone manufacturer or some other unknown company.

We'll see

Dick James
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Dick James   2/24/2015 2:53:41 PM

At Semicon West Intel announced their foundry arrangement with Panasonic, and Shekhar Borkar was heard to say "there will be more"..

resistion
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resistion   2/25/2015 12:32:26 AM

Looks like it is still far from the several thousands of wafers per day with immersion: http://www.electronicsweekly.com/mannerisms/rd/tsmc-runs-1000-euv-wafers-day-90w-2015-02/

Strictly speaking, they only had one 1022 wafer/day run and several 400+ wafer/day runs. The throughput is merely 42-43 WPH.

Anyway, looks like all the companies who have worked on EUV are finding ways to exit gracefully. 10 nm is about time to do so.