Ronald Luijten of IBM Research (above) described a microserver based on a 28nm Freescale T4240 with 12 64-bit PowerPC cores running at 1.8 GHz. A second-generation of the card he holds will slot into a 2U rack unit, packing 128 nodes, 1,536 cores and up to 6Tbytes DRAM.
Intel’s Xeon chips have faster single-thread performance, but the microserver design is more power efficient for applications using many threads, he said.
Separately, Xilinx showed a protocol agile transceiver capable of spanning data rates from 0.5 to 32.75 Gbit/s. It demoed the 20nm part (below) running across an electrical backplane (lower left) and optical links (lower right).
What I saw at ISSCC 2015:
— Rick Merritt, Silicon Valley Bureau Chief, EE Times