PORTLAND, Ore.--IBM Research (Albany, N.Y.) has leapfrogged Intel to the 7-nanometer node by perfecting extreme ultra-violet (EUV) lithography and using silicon-germanium channels for its finned field-effect transistors (FinFETs). This breakthrough demonstration should also keep IBM on-track in delivering its next-generation Power 8+ next year and it Power-9 processors the year after, manufactured for it by GlobalFoundries. Alliance development partner Samsung will also get a leg-up on its race to catch up with Intel by 2018 when the first production 7-nanometer chips are expected to appear. The 7-nanometer test chips were fabricated at the alliance's 300 millimeter fab at the State University of New York (SUNY) Polytechnic Institute's Colleges of Nanoscale Science and Engineering (CNSE, Albany, New York).
"I'm surprised and impressed," Richard Fichera, vice president and principal analyst at Forrester Research (Cambridge, Mass.) told EE Times in advance of the announcement. "It doesn't mean they are going win the 7-nanometer race, but it shows that they are still in the race. People that were counting them out are now going to be changing their minds. IBM has done a lot of materials research and gate design to make this happen, whereas all the stuff that Intel talked about at 7-nanometer node was hesitant. There is no guarantee that IBM will get it into production before Intel, but its a wakeup call to Intel that there is someone breathing down their neck even if Intel ends up becoming the major producer of 7-nanometer parts."
The three major breakthroughs made by IBM to produce its test chip is the perfection of EUV lithography, the successful deposition of strained silicon-germanium transistor channels on bulk silicon wafers, and its optimization of middle-of-the-line and back-end-of-line processing for minimization of parasitic capacitance, thereby making its process manufacturable by merely transferring it to a 7-nanometer fab (which will cost GlobalFoundries and Samsung upwards of $6-to-10 billion each to build).
"Our test chip has all the features we knew that we needed to keep our Power series of processors ahead in performance," Mukesh Khare vice president of semiconductor technology for IBM Research told EE Times in advance of the announcement. "Our test chip is a quantum leap forward--we have FinFETs, SRAM cells, interconnects and everything else you need on it to make real 7-nanometer Power processors."
Of course, IBM still plans to come out with its 10-nanometer Power processors, the design for which was revealed at last year's 2014 International Symposium on VLSI Technology and Applications, probably in 2016. But it now is on-track to keep Moore's law going to the 7-nanometer node too, circa 2018.
"We have more work to do on it before transferring to manufacturing, of course, but we are very excited about out results so far," Khare told us. "We have successfully made a major change in lithography, a major change in materials and insured the way forward for IBM high-performance systems for cloud computing and big data."
Besides showing the way forward for IBM Systems, the 7-nanometer demonstration is also an endorsement of the joint development alliance with GlobalFoundries, Samsung and their equipment suppliers--after all GlobalFoundries is just a half-hour down the freeway from IBM's lab at SUNY and Samsung having access to the processing details should boost its credibility at 7-nanometer as well.
Transmission electron microscope (TEM) image of IBM's 7-nanometer node finned field effect transistors (FinFETs) packed below 30-nanometer fin pitch using self aligned patterning.
(Source: IBM Research)
"I think IBM, GlobalFoundries and Samsung are celebrating their successful collaboration with SUNY at 7-nanometer. This is a real commitment to the idea that IBM does not need fabs and they're proud that they are going be able to supply fabs with this turn-of-the-crank on Moore's law," Richard Doherty, research director of the Envisioneering Group (Seaford, N.Y.) told EE Times in advance of the announcement. "The next phase of semiconductors will be very different, especially regarding Intel. IBM's secret sauce is its silicon-germanium channels and would have been an amazing achievement at 10-nanometer, but at 7-nanometer are remarkable."
According to Khare, competitors who have fabricated 7-nanometer test chips have kept mum about it because their performance was actually worse after scaling, but IBM has worked very hard to optimize each phase of the process to insure the kind of bump in performance you would normally expect from Moore's law. Their 7-nanometer FinFETs are stacked at below 30-nanometer pitch, packing them closer by nearly 50 percent with at least a 50 percent power/performance improvement as well, according to Khare.
Professor Michael Liehr (left) of SUNY Polytechnic Institute's Colleges of Nanoscale Science and Engineering (SUNY Poly CNSE) and Bala Haran (right) of IBM Research inspect 7-nanometer wafer of test chips developed in alliance partnership between IBM and SUNY Poly CNSE.
(Source: Darryl Bautista/Feature Photo Service for IBM)
"EUV was very challenging--a difficult project that had to go through many material changes and optimizations to successfully fabricate at 7-nanometers," Khare told us. "But IBM has long history of semiconductor breakthroughs, including the single cell DRAM, chemically amplified photoresists, copper interconnects, SOI, strained engineering, multi-core processors, immersion lithography, high-k gate dielectrics, embedded DRAM, 3D chip stacking and air gap insulators. This is just the beginning of a new era of breakthroughs as a result of our $3 billion investment for five years announced in 2014, which also includes research into quantum computing and graphene."
In recent years, IBM appeared to have been moving toward becoming a solution provider with its successes with Watson and cloud computing infrastructure, but its successes in basic semiconductor research do not seem to have suffered, according to Roger Kay, founder and president of Endpoint Technologies Associates (Wayland, Mass.)
"Their 7-nanometer test chip is obviously a breakthrough, but its still in its early days and a long-way from the fab," Kay told us in advance of IBM's announcement. "There is also a little bit of irony in that Intel has expressed extraordinary confidence in getting to 7-nanometer first. Intel said they have 10-nanometer nailed and 7-nanometer on the way, but Intel has been very quiet lately and now it appears that IBM is ahead at 7-nanometer. Everyone has been struggling with EUV, but IBM says they have it worked out, but the silicon-germanium channels is the real news. If all goes as planned for IBM, we will see samples of 10-nanometer chips from Intel and IBM next year, while the other guys are at least a year behind."
Close-up of IBM 7-nanometer node test chip produced at SUNY Polytechnic Institute's Colleges of Nanoscale Science and Engineering (Albany, New York).
(Source: Darryl Bautista/Feature Photo Service for IBM)
The multi-billion dollar Albany NanoTech Complex, built in collaboration with New York State, includes a $500 million program with several other nano-electronics companies. The Complex also offers SUNY engineering students scholarships and fellowships to prepare them for the next era of computer chip technologies.
— R. Colin Johnson, Advanced Technology Editor, EE Times
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