TORONTO—Samsung is now producing what the company said is the industry’s first 12Gb LPDDR4 mobile DRAM using its 20-nm process technology.
“It’s interesting that Samsung used the LPDDR4 to introduce the next density," observed Objective Analysis principal analyst Jim Handy in an email interview with EE Times. “Companies usually start with a higher-density standard DRAM, then chop it down to make one of these ‘between sizes’ of LPDDR. This time Samsung reversed that approach."
He said a higher-density chip also means devices can reduce their chip count, and that means that the battery will last longer. “That should make this chip pretty popular."
There are a few reasons Samsung opted to go the LPDDR4 route first with this density, and although extending battery power is important, it’s not at the top of the list. Stephen Lum, Samsung Semiconductor’s senior product marketing manager for mobile memory, said told EE Times via telephone the focus on LLDDR4 for mobile devices reflects the reality that they demand more use of the main memory as compared to PCs and laptops.
He said the flagship smartphones that are launching today are now processing 4K video, which is demanding more powerful memory. At the same time, users are expecting a slimmer phones with long battery life. “With PCs and servers you have a lot more room to play with," he said. “High density die is more important in mobile."
Ultrabooks and laptops are now adopting LPDDR3, said Lum, with the main benefit being longer battery life so users don’t have to lug their power cables everywhere.
Samsung's 12Gb LPDDR4 mobile DRAM uses the company 20-nm process technology and is aimed at meeting the requirements of high-end smartphones
Lum said the 12Gb LPDDR paves the way for 6GB DRAM, but that Samsung will begin mass producing 3GB DRAM first. There is a rapid movement to higher densities, he added, particularly for higher-end smartphones that are being used to create 4K video; tablets aren’t as demanding as they are more about consuming media and productivity. “A lot of those functions don't require high bandwidth consumption."
Most video today is 30 frames-per-second, noted Lum, in the near future we could see 60fps, which would put additional pressure on memory.
LPDDR4 does make sense for a great deal of other devices because of its low power consumption but not all of them need the density of Samsung’s latest chip. Lum said smartwatches don’t require it yet, but their needs will increase as they become even smarter. Similarly, LPDDR4 makes a lot of sense for Internet of Things devices.
Another area gaining traction for LPDDR4 is the automotive sector as cars become smarter thanks to infotainment and assisted driving systems. Lum said self-driving cars will further the memory requirements of vehicles.
Samsung is not alone in this view. Earlier this year, Micron announced automotive-grade LPDDR4 DRAM for high speed applications. The company said its LPDDR4 products meet the automotive-grade industrial temperature range of -40 to 95°C while enabling 33% higher peak bandwidth than DDR4 and twice the bandwidth of LPDDR3 while using less energy per bit than LPDDR3. It's also able to fit into the smaller spaces of compact automotive systems.
Beyond cars, there are all sort of devices that low-power memory, including smart appliances and entertainment devices such as TVs and Over-the-Top (OTT) boxes such as Roku and Apple TV.
According to LPDDR4 specification was last updated a year ago by the JEDEC Solid State Technology Association. JESD209-4 was designed to significantly boost memory speed and efficiency for mobile computing devices such as smartphones, tablets, and ultra-thin notebooks and will eventually operate at an I/O rate of 4266 MT/s, twice that of LPDDR3.
Performance gains were achieved by completely redesigning the architecture, going from a one-channel die with 16 bits per channel to a two-channel die with 16 bits per channel, for a total of 32 bits. This architecture allows the clock and address bus to be grouped together with the data bus, thereby minimizing the skew and allowing the LPDDR4 device to reach a higher data rate, which saves power and improves timing margins compared to the LPDDR3 architecture.
—Gary Hilson covers memory and flash technologies for EE Times and is the editor of Memory Designline.