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Micron 3-D NAND Back to Moore

Even denser crossbar arrays in 2016
1/8/2016 09:11 AM EST
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R_Colin_Johnson
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Re: 16nm vs 20nm
R_Colin_Johnson   1/15/2016 8:21:35 AM
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Micron relaxed their design rules back to 40nm, as mentioned in the story, depending on the extra layers stacked in 3D to make up the difference in memory capacity. Now they can shrink, always a few generations behind, in order to keep their costs thus prices of 3D NAND down. Not sure about "price warring" possibilities, they probably could but the bean counters will determine whether warring is more profitable than maintaining parity with bigger margins :) Thanks for the comment, resistion.

resistion
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16nm vs 20nm
resistion   1/15/2016 12:57:42 AM
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if they could only shrink in one direction going from 20nm to 16nm, I don't know how 16nm could be cheaper than 20nm.

Will they be able to wage a price war with Samsung's V-NAND?

R_Colin_Johnson
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Re: Ehrm, HMC in 3D XPoint Future?
R_Colin_Johnson   1/12/2016 12:42:19 PM
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I think you are right. They could put a DDR4 interface on it and use it both for memory and for their SSDs.

DougInRB
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Re: Ehrm, HMC in 3D XPoint Future?
DougInRB   1/12/2016 11:53:58 AM
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Micron may want to put an HMC interface on it, but I don't think that this will be Intel's angle.  If they want it to go mainstream, they will put a memory-like or flash-like interface on it - or offer both solutions.

R_Colin_Johnson
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Re: Ehrm, HMC in 3D XPoint Future?
R_Colin_Johnson   1/10/2016 9:46:12 AM
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Micron is keeping details about the XPoint memory close to its vest at this point, but the Hybrid Memory Cube is my best guess at its packaging possibilities. Thanks for the careful reading.

Gil Russell
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Ehrm, HMC in 3D XPoint Future?
Gil Russell   1/10/2016 3:23:08 AM
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Colin, third figure is for the Hybrid Memory Cube - implication is that 3D XPoint will be packed into HMC cubes or is the figure wrong?...,

R_Colin_Johnson
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Back to the Future Again
R_Colin_Johnson   1/8/2016 11:24:48 PM
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Micron/Intel regain the handle on Moore's Law scaling by taking Flash into the third dimension thus relaxing planar rules back to traditional scaling capabilities and you won't believe what they have up their sleeve for 2016--3D XPoint that takes the number of transistors needed for a reliable bit down to zero!

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