REGISTER | LOGIN
Breaking News
News & Analysis

AI Chip Startup Shares Insights

"Very large" FinFET chip in the works at TSMC
11/1/2016 12:01 PM EDT
1 Comment
NO RATINGS
Page 1 / 2 Next >
More Related Links
View Comments: Newest First | Oldest First | Threaded View
spike_johan
User Rank
Author
Interesting design approach
spike_johan   11/1/2016 7:51:21 PM
NO RATINGS
Your post states,"The IPU will hold the complete machine learning model inside the processor."

I wonder if that means the model will loaded via software from high speed access to memory (much like an OS) or if the machine learning model will be burned into the hardware of the IPU itself.

The latter is kind of implied as Mr. Knowles states, "It will be a very large chip."

Either way, this design deviates from the memory centric, custom silicon (ASIC/FPGA/CPU) approach that you have often reported on in other articles.

Most Recent Comments
resistion
 
resistion
 
Evariste
 
resistion
 
resistion
 
resistion
 
R_Colin_Johnson
 
balajis_snps
 
David Ashton
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed