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Nvidia CEO Says Moore’s Law Is Dead

6/1/2017 12:01 PM EDT
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Re: lots of mixed messages, Moore's Law is alive and well
IanD   6/15/2017 5:50:57 AM
And customised NN chips are in turn a lot faster and lower power and cheaper (in volume) than FPGAs, like any custom ASIC is. For the likes of Google the increased speed and much lower power consumption and unit cost makes using custom ASICs a no-brainer, the power savings alone more than pay for the development cost.

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Re: lots of mixed messages, Moore's Law is alive and well
GroovyGeek   6/15/2017 4:20:22 AM
While GPUs are better than CPUs at most NN tasks, FPGAs are even better (after appropriate customization). The inevitable conclusion is that GPUs will likely handle the low end of the AI tasks, with the heavy lifting getting done by specialized FPGAs. Advantage Xilinx and Altera/Intel.

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Only DRAM scaling remains
resistion   6/6/2017 1:16:34 AM
NAND stopped at 15/16 nm and then went 3D, progressively degrading read current. FinFET gate pitch is bottoming out at 40 nm. Only DRAM marches on with Samsung announcing 15 nm later this year and Micron starting work on 13 nm.

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The reports of my death are greatly exaggerated.
sixscrews   6/5/2017 10:16:01 PM
After 40 years of engineering I have a hard time with projections of the future.

The future will be brilliant!

The future is a disaster!

Moore's Law is dead!

Well, what is Moore's Law?

I won't venture to pronounce on that - other posters have quoted from Moore's (and others) writings from the period.

I would say that our understanding of Moore's Law (whatever that is) is dead.

So let's go forward - smaller device geometries, 3-D geometires, whatever.

Build it and, if it works, they will buy it.

'nuff said.



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Up as well as out?
perl_geek   6/2/2017 4:59:29 PM
What about the effect of going into the third dimension, creating transistors vertically as well as horizontally? (Obviously, layers are already involved, but how much scope is there for fabricating vertically?)

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lots of mixed messages, Moore's Law is alive and well
IraRal   6/2/2017 2:46:52 PM
This guy is really ful of mixed messages.

Let's start with his first quote: "Microprocessors no longer scale at the level of performance they used to — the end of what you would call Moore's Law,"

Moore's law was never about anything but economics and transistor density. With that in mind, Moore's Law is actually doing better than ever. Intel's 10nm is bumping against the 100 million transistors per square millimeter and with Bohr's recent interview at Semicondcutor Engineering he suggested that their 7nm node will retain a consistent 0.7x scaling which would put them at over 200 million transistors per square millimeter. Since Nvidia uses TSMC, despite their silly node naming, they are well well behind with respect to desnity. But nonetheless Moore's Law is still alive and better than ever.

Let's use Nvidia's very own flagship AI product: their new V100 which is manufactured on TSMC's "12nm FFN" (which is obsucation for their 16nm FinFET which it in itself just their 20nm BEOL with a planar switched to FinFET to get better power reduction). It has 21B transistors on a 815 mm²  die. Given TSMC's reticle limit is around 832mm² (roughly 32mm by 26mm), it's very clear Mr. Huang is in desperate need for more of Moore's Law. The problem is exacerbated when you take into account the power and heat limits. Calling the law dead is premature given Nvidia insatiable appetite for more transistors.

I do understand that he is trying to call for a paradigm shift since our traditional performance enablers (logic techniques, NOT Moore's Law!) running out of steam and we need to look into smarter utilization of our available resources but he is not saying that and his products are not exactly any different than how they've always improved - through Moore's Law enablement.

Since the author decided to mention the 1975 paper, it's worth noting that Gordon Moore himself coined the term "circuit and device cleverness" in that very paper suggesting that cleaver use of the higher transistor density will be necessary along with scaling to improve products.

sw guy
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gate count is not everything
sw guy   6/2/2017 6:57:20 AM
scaling matters

When using twice gates count for a memory chip, it is very probable that memory size is doubled, too
(let us say the difference is inside rounding error).

Not so easy for a CPU core. See what happens for human performed task, as soon as head count reaches some critical size.

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