SAN FRANCISCO—On the eve of the annual Semicon West tradeshow here, the Imec research institute described work with new materials, process modules and architectures aimed at alleviating high-density interconnect challenges that loom just down the road for semiconductor manufacturing.
At Imec’s annual U.S. technology forum here Monday (July 10), Zsolt Tokei, a distinguished member of Imec’s technical staff focused on interconnects, explained how chip interconnects are being squeezed ever tighter with continued scaling. As chip dimensions shrink, so too does the cross-sectional area of the copper wires within, increasing the resistance-capacitance of the interconnect and signal delay.
Tokei said the emergence of RC delay issues started several technology nodes back and have become increasingly challenging at each node since. He said Imec and partners including Intel, Samsung and TSMC have shown options for high density interconnect at future nodes.
Options being explored by Imec include the use of “scaling boosters” like new cell architectures and new interconnects featuring supervias and semi-damascene structures, a hybrid of single- and dual-damascene, Tokei said. Imec is also looking down the line at replacing copper (Cu) with alternative metals including cobalt (Co), ruthenium (Ru) and, ultimately, compound materials, he added.
“Alternative metals provide substantial reliability benefits,” Tokei said. “One of the key promises is that reliability issues will go down because these metals are intrinsically more reliable [than copper].”
But Tokei also stressed that dual-damascene copper interconnects—the dominant interconnect technology in the semiconductor industry for the past 20 years—are alive and well, for now.
Imec believes it can extend Cu-based dual-damascene technology into the next technology nodes. The research institute announced it has demonstrated an electrically functional 5nm solution for back-end-of-lineinterconnect using adual-damascene module using multi-patterning.
Dense-pitch blocks enabled by a dual damascene flow and multi-patterning.
But beyond 5nm, Ru—a transition metal that boasts low resistivity—is among the candidates being explored to replace Cu as the conductor. Imec says it has created Ru nanowires in scaled dimensions with a 58nm2 cross-sectional area. In addition to low resistivity and high reliability another feather in Ru’s cap it oxidation resistance, which eliminates the need for a diffusion barrier.
Other options being explored by Imec for future interconnects include insertion of self-assembled monolayers or alternative signaling techniques such as low-energy spin-wave propagation in magnetic waveguides, exploiting the electron’s spin to transport the signal. Imec says its researchers have experimentally shown that spin waves can travel over several micrometers, the distance required by short and medium interconnects in equivalent spintronic circuits.
—Dylan McGrath is the editor-in-chief of EE Times.