SANTA CLARA, Calif. -- ARM put software and security, out front at its annual conference here, but the event also was packed with hardware nuggets that ranged from talks by top foundries to demos of diverse customer SoCs.
ARM needs the fertilizer of its free Mbed software to grow its portfolio of processor IP into a big, safe marketplace. As a bonus, it hopes a paid-for servces business sprouts some day for delivering security patches and other updates over the Internet of Things.
Candidly, executives admit Mbed still lacks engagement from customers in vertical markets. So, it made sense the company to lead with that new foot at the event.
In silicon, ARM is an old hand. Fellow Greg Yeric painted a compelling picture in a closing keynote of semiconductors at a historic transition. It’s a good news/bad news story.
The end of traditional semiconductor scaling could come within 6-8 years with a heroic 2nm node enabled by high numerical-aperature extreme ultraviolet lithography. Before we get there, DRAM as we know it may hit a wall—the “scariest” prospect on the horizon. However on the other side of a still-murky chasm lies a wealth of promising research in packaging and materials.
Tomorrow's chips may use 3D four ways, said Yeric. (Images: EE Times unless otherwise noted)
“We know a big change is coming, we have a lot of options...and we know there is some strange stuff ahead we may have to jump to...lots of cool technologies are coming that don’t look like MOSFETs or Von Neumanncomputers,” Yeric said.
In the not too distant future, devices could adopt as many as four 3D technqiues, stacking everything from packages and die to transistors. However, “this 3DIC aproach breaks our normal desgn tools,” he noted.
Long term, a flood of new materials promse eve bigger changes, he said, ticking off a list of more than a dozen that hit the news in a recent month. They include advances in 2D semiconductors using novel electronics properties, Stanford’s innovative SoC using carbon nanotube transistors and metamaterials created with emerging nanometer engineering capabilities.
All the new techniques will take chip makers „outside our comfort zone... [and] none of it is ready for prime time...[but] there’s so much activty in so many fields...[that] we have a system scaling opportunity larger than we can imagine with the current materials work in physics and chemistry,” he concluded.
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