This technology illustrates the pressure to create workarounds for the recent Moore's Law crunch that means smaller geometries are not appearing fast enough to meet demand.
Previous EDC/ECC and other flash-'nursing' initiatives failed because bigger chips appeared that allowed the protection to be implemented at a higher level, in software. Hardware was only necessary for custom high-integrity applications.
STEC have a window of opportunity to make MLC work for a wider range of applications before a memory breakthrough pushes the density up again cheaply enough to compete. But is that breakthrough in sight? I personally love FRAM but can it be made dense enough? I think not.
Production will also only be available when a big fab becomes surplus to DRAM or flash requirements. No-one will build a fab for FRAM speculatively, I think.
Perhaps a slowdown will create spare FAB capacity?
Agreed about FRAM: love the idea, but I doubt density will reach levels high enough for use in computers as Storage: maybe BIOS/EUFI.
I like the materials from STEC, but not able to find any products identified as containing their technology, even searching all their links. Looks like vaporware to me.
where did this figure of 30 full-device writes per day come from? I'm sure there's a market for that, but it has to be fairly small. obviously, most storage and computation is more consumer-like, with read-mostly loads, and often much sparser duty cycles than 24x7. it's easy to find very cheap SSDs today that peak at 500 MB/s and 80k iops and still offer 3-5 year warranties. commodity storage is cheap enough to simply use above-device redundancy to solve issues of reliability and permanence.
STEC's pitch seems to be pretty intensive engineering at the device level - laudable, but do people buy these inherently more expensive (and apparently slower) devices and trust them without any above-device redundancy (raid, etc)?