I agree. The fact that relativistic physics is needed to explain the observed orbit of Mercury does not prevent us from teaching Newton's laws of motion. A philosophical question is whether or not we SHOULD teach Newton's laws. Note that we still refer to those equations as Newton's "laws", though they are known to inadequately describe observed reality. In other words, Newton's laws of motion describe motions that are physically impossible. It is quite possible that Einstein's laws will also be shown to have inaccuracies. So, another philosophical question is just how close to observed reality does an equation have to be in order to be considered a law?
I disagree with Colwell"s statement,"when Moore's law stops it will be economics that stops it, not physics". Based on the transistor physics, the short channel effect or transistor leakage current will increase as the transistor is scaled. Today we have only three process technologies: Bulk Si, FDSOI and FinFET. Bulk Si technology is in high volume manufacturing at the 28nm node for several years by major semiconductor companies, and may extend to the 22nm, but with excessive transistor leakage current, thus definitely not beyond the 22nm. FDSOI is invented by IBM more than 10 years ago, but not manufacturable at any technology node yet mainly because Soitech, the largest SOI wafer supplier can't deliver 7nm thin SOI that is required for the 28nm node. It means that FDSOI is already dead and Bulk Si will be dead at the 28nm, not because of "the money" for manufacturing but because of device physics. FinFET is the only technology in volume manufacturing today at the 22nm by Intel, and the 14nm will be manufactured sometime in 2014. The beauty of FinFET technology is that it can extend to the end of scaling or even to the 1nm node according to FinFET physics. In order to overcome the short channel effect the Fin width, W is equal to the gate length, Lg is required. Or W(Fin width)=Lg(gate length). It means that for the gate length, Lg=3nm, the Fin width W=3nm is only require to overcome the short channel effect. The Fin width, W here is equivalent to the channel thickness for the conventional transistor. Therefore, FinFET will be able to extend to the 3nm node by 2030s beyond the 7nm by 2022. Multiple exposures are used today by Intel for the 22nm FinFET manufacturing. With availability of EUV and 450mm wafers possibly at 14nm, 8nm and 3nm nodes the manufacturing cost per die and per transistor will be significantly reduced. There is no alternative to FinFET today. Moore's Law will be alive to the end of FinFET scaling. SKim