1. Actually RISC-V supports 32, 64 and 128 bit adress spaces. There are actually two reserach efforts that are using the 128 bit option. So it is not a "only on paper" feature ! Useful for memory mapped sparse address spaces that storage folks use.
2. OO is orthogonal to the ISA but RISC-V does make OO much easier to implement. Not having artifacts like condition codes makes a micro-architceture designer's life a lot easier. Two OO implementations have been released.