At CES in January 2019, Nvidia’s chief executive, Jensen Huang, said what most of us in the tech business had already considered and accepted: Moore’s Law, which predicts regular increases in the computing power of silicon chips, is dead.
Today, the smallest commercially produced chips have feature sizes that are a minuscule 7 nm. As transistors get closer to atomic scale, it’s getting harder to shrink them further. Many believe that today’s most advanced transistor design, the FinFET, can’t get below 5 nm without a major rethink—and that even 5 nm may be prohibitively expensive. That means, in turn, that it’s harder to double the density of transistors on a silicon chip every 24 months, as Moore’s Law predicts.
The death of Moore’s Law has major implications, as a slowdown in performance improvements could hit some computing applications hard. Horst Simon, Deputy Director of the Lawrence Berkeley National Laboratory, helps rank the 500 most powerful supercomputers in the world twice a year. He notes that while year-over-year increases remain significant—annual performance growth hovers at around 1.6x per year—there has been a marked reduction from the 1990’s and early 2000’s when annual improvements regularly exceeded 2x.
“At the high end, we’ve seen a slowdown,” Simon said. That slowdown could impact disciplines from astrophysics to climatology, which rely on supercomputer simulations for research.
Despite the potentially epoch-changing feeling that a lack of continuing compliance with Moore’s Law may evoke, there are many ways to improve performance without squeezing more transistors onto each chip (or waiting decades for the development of exotic solutions like spintronics). It just takes a little creativity.
One promising tactic is further specialization. Over the past 20 years, we’ve seen the widespread adoption of GPUs to handle calculations for 3D computer graphics and other multi-threaded tasks as they can handle some of these workloads far faster than general-purpose CPUs. Today, companies are starting to broaden the application of specialized chips—also called accelerators—to other areas including machine learning, security and cryptocurrency.
Valeria Bertacco, Director of the applications driving architectures research center at the University of Michigan, says we “are just seeing the beginning” of this trend.
Today, we have five or six types of specialized processors, but in five to 10 years that may turn into 100, she says. This finer grain of specialization brings the potential to develop processors that can handle applications that are difficult for today’s hardware, such as the complicated graph-based computations needed to analyze social networks.
“Scaling silicon is not the only way to get lower power and better performance,” she said. “It was just the easiest way until 10 years ago.” A decade from now, people shopping for a high-end computer may pay less attention to its overall processing power in GHz and more to how many specialized processors it includes.
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Some of the most noticeable performance improvements in the next 10 years may not come from new chip designs at all—instead, they’ll come from catching up with what is already available. The Internet of Things (IoT) is the greatest example of this, as it has largely been born on technology that is already a decade old.
IoT applications perform relatively simple computing tasks such as running sensors and periodically firing off a few bits of data, which means high levels of compute performance often are not necessary. As a result, builders and users of IoT tech tend focus on cost, and older technology is always cheaper to use than its successor.
This natural progression means that everything from sensors on factory floors to your Alexa-enabled toaster can still benefit from a decade’s worth of improvement, based on Moore’s Law. So, while Moore’s Law is dead for those at the leading edge of chip design, its ghost lingers on.
Even without increasing transistor density, we can sometimes squeeze out more efficiency gains simply by re-architecting existing tech. One design solution is moving to a 3D structure: gluing processors one on top of the other, rather than setting them next to each other in a chip. This allows processors to communicate with each other more quickly and efficiently. It also saves money on packaging, as manufacturers don’t have to wrap each individual processor in plastic.
These solutions and others that creative engineers dream up should be enough to see us through the next decade or so of performance growth. In the long term, however, the end of Moore’s Law might signal that the semiconductor industry has outgrown silicon altogether.
Exotic materials such as gallium nitride, which can conduct electrons more than 1,000 times more efficiently than silicon, is one possible way forward. For example, spintronic devices can use new materials such as organic-inorganic hybrid perovskites, thinking outside of the box of what we use to build chips.
For these still-speculative technologies, however, commercialization is a decade or more away. Their development will be driven by investment from agencies like DARPA (which recently committed $1.5 billion to its Electronics Resurgence Initiative), not from established manufacturers or venture capital firms.
Today’s industry players are instead taking a look at short-term solutions—ones that don’t require a wholesale reboot of the entire chip design and manufacturing process. With a little creativity and elbow grease, they should be able to keep generating noticeable performance gains.
We have the chance to rethink and squeeze more performance from existing designs. We can also think beyond the next round of improvements—which we might call “reassess, redesign and recycle”—to the possibilities for new materials and processes that will keep us going for the next few decades.
If we do all of this well—as I think we’re well-positioned to—the average consumer may barely notice that dear old Moore’s Law is in the ground, even though there will be a procession of mourners for some time yet.
–Rob Aitken is a Fellow and Director of Technology with Arm. He also is an IEEE Fellow and General Chair of the 56th Design Automation Conference to be held in June 2019.
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