“Education, education, education” — a simple slogan, but one that worked, and one that has contemporary implications for the electronics industry owing to the on-going shortage of newly-qualified electronics engineers, along with the concern that those new graduates are often not fully-equipped with the necessary skills to be useful to the companies that employ them.
In the area of CPU design, however, engineering students are getting a significant boost. One company has just made the unusual decision to give something to colleges and universities around the globe that will help students gain a better understanding of the fundamentals of programmable electronics.
In April this year, Imagination Technologies — most famous for its flagship products: PowerVR and MIPS — made a revolutionary announcement: as part of its university program, the company would start offering free and open access to a fully-validated, current-generation MIPS CPU in a complete teaching package.
CPU architecture is generally taught as part of electronic engineering, computer science, and computer engineering courses. Until now, what’s been missing from all of these curricula is access to real, un-obfuscated RTL code that will let professors and students study and explore an actual CPU.
Traditionally, the CPUs given to academia are locked down so that only certain software can be run. Meanwhile, the register transfer level (RTL) code is disguised in such a way as to make it practically impossible to reverse-engineer. Now, for the first time in the history of modern processors, a current CPU core has been opened up to universities.

Imagination’s new program, which goes by the name MIPSfpga, is designed to bring a new CPU architecture education paradigm to universities around the world. Through MIPSfpga, university professors, students, researchers, and other members of the academic community will be able to see the actual RTL code and study the inner workings of this elegant RISC processor. Furthermore, this CPU has all the features — MMU, cache controllers, debug interfaces, and so on — required to run a full operating system such as Linux. CPUs in other university programs are obfuscated, meaning they are effectively “black boxes” to the students. Until now, none of the major architectures were available in an open form.
MIPS is one of the major CPU architectures in commercial use today, and is one of the three architectures supported by Google for the Android operating system. MIPSfpga provides universities with a simpler configuration of the MIPS microAptiv CPU core that’s optimized for teaching and projects.
microAptiv CPUs are used in many commercial products; for example, a high-performance microAptiv CPU sits at the heart of the PIC32MZ microcontroller from Microchip Technology, and two of them are in Samsung’s new “Artik1” IoT device.
The MIPS CPU is being offered as part of a complete free-to-download package for universities, together with a getting started guide, teaching guide for professors, and examples designed to enable students to see how the CPU works and explore its capabilities. With these materials, students can configure a CPU and peripherals on a low-cost FPGA platform, then program the device and run a full JTAG-supported debug.
MIPSfpga is not open source in the traditional sense, but it does let students go deeper into a current architecture than they have ever been able to do before. The terms of the MIPSfpga agreement state that universities and spin-offs will not be able to use this package to start making their own chips without a license from Imagination. They also will not be able to make changes to the architecture that they could later patent without first obtaining permission.
I believe that this is the most significant contribution to teaching microprocessors that I have facilitated during my time engaging companies with academia. The enthusiasm of educators to encourage this project has been a wonderful motivator.
Some of the best engineering learning institutions in the world have already signed up for the program, including Harvey Mudd College, Imperial College London, University College London, Keio University, Tsinghua University, Shanghai Jiao Tong University, and many others.
Furthermore, the MIPSfpga program has support from where it all started: Professor John L Hennessy, currently President of Stanford University, who invented MIPS in the early 1980s said: “I am pleased to see MIPS rejuvenated under Imagination’s care, and to see Imagination rolling out this exciting new program that brings MIPS back to academia in a big way.”
MIPSfpga will create a new generation of students coming out of university who are familiar with the MIPS architecture and its application in SoC design. This will help them get a foot in the door of global semiconductor providers.
MIPSfpga is also relevant to the latest developments in industry: the emergence of the Internet of Things (IoT) market will drive a need for lower cost and lower power CPU cores. The MIPS architecture is ideally suited to these applications. Through academic innovation, MIPSfpga will be part of a new wave of advancements!
This is a win-win-win situation for academia, Imagination, and the industry at large. Students now have unprecedented access to the inner workings of a popular CPU; Imagination will be a useful and relevant partner for academia worldwide; and the industry will have designers that better understand the exciting opportunities that FPGA systems and SoCs afford.
Robert Owen is Manager, Worldwide University Program, Imagination Technologies.
Related posts:
- Chips in Space — MacSpace, A Record Throughput Multi-Core Processor for Satellites
- Making EDA Exciting Again
- What Will Make Wearable Technology Take Off?
- Building a Mandolin-to-MIDI bridge with a PSoC
- Performance in Hardware Emulators
- Thermal Interface Materials Market Heating Up
- New Advances in FPGA Security

Join over 2,000 technical professionals and embedded systems hardware, software, and firmware developers at ESC Minneapolis November 4-5, 2015 and learn about the latest techniques and tips for reducing time, cost, and complexity in the embedded development process.
Make sure to follow updates about ESC Minneapolis’s talks, programs, and announcements via the Destination ESC blog on Embedded.com and social media accounts Twitter, Facebook, LinkedIn, and Google+.
The Embedded Systems Conference, EE Times, EDN, EBN, and Embedded.com are owned by UBM Canon.

"Now, for the first time in the history of modern processors, a current CPU core has been opened up to universities" Really? Never heard of OpenSPARC? That was much better in many respects: 1) Ten years earlier 2) Open to everybody and not only academia 3) Based on the much more powerful UltraSPARC T1/T2 4) No restrictions about ASIC implementation