SoC Spec Defines Core Interfaces

SAN JOSE, Calif.—The Heterogeneous System Architecture (HSA) Foundation defined interfaces for third-party IP blocks so engineers can design SoCs compliant with its specs for shared coherent memory. To date, only Advanced Micro Devices, which initiated the group, ships a processor supporting the ad hoc standard for speeding up on-chip processes shared among different cores.

The HSA spec is positioned as a more open alternative to the SoC techniques and programming environments supported by Intel and Nvidia. The interfaces defined in HSA’s version 1.1 released today are already baked into a handful of CPU, GPU, DSP and fabric cores from at least three vendors including Arteris and Imagination Technologies.

“In our version 1.0, SoC makers didn’t need to define how, say, a DSP gets access to a shared memory-page table,” said John Glossner, HSA’s president. “Now what were opaque elements of the standard are specified in a way that gives us multivendor transparency, enabling vendor-neutral device drivers,” he said.

More than 40 companies are part of the group, including ARM and Mediatek which have said they will support the approach. The technology aims to serve a broad set of markets from mobile SoCs and desktops to high-performance computing systems.

“All our new products will support HSA,” said Glossner, who works for Optimum Semiconductor Technologies, a US-based IP licensing company that is part of a larger chip conglomerate in China.

Looking forward, “the next two years are about getting software up and working — this is the first multivendor spec we’ve released,” said Glossner, with a debug spec expected to be the biggest part of the work.

“Debugging multiple hetero cores from a single source is complex, and we want to make sure to get it right, trying to poll and set break points is difficult and needs higher level abstractions – a heterogenous debug tool suite should look like it is uni-threaded,” he said.

HSA already supports a basic form of debugging.

“We support passing high-level debug information to [an abstracted agent], and it is included in the generated code object,” said Glossner. “We are working towards making that support universal across tools just like we did for profiling,” he added.

The 1.1 spec already supports profiling across cores. Tools including open source compilers and a runtime environment for HSA are currently available with test results published by AMD and academics in the group.

The HSA spec is agnostic about programming environments although its main target has been OpenCL. A parallel version of C++ is due in 2017 that should be able to take advantage of the HSA techniques, Glossner said.

The group has not yet decided of future hardware will require additions that might generate a version 2.0 spec.

— Rick Merritt, Silicon Valley Bureau Chief, EE Times

Related posts:

• AMD Pushes GPUs Through New HSA Tools
• Arteris Rolls New Heterogeneous SoC Architecture
• SoC Spec Hits Version 1.0